Senior Analog Layout Engineer

Position Overview

As a Job Developer at Capgemini Engineering, you will lead a layout team to deliver complex analog/mixed‐signal layouts for deep submicron CMOS circuits, including advanced FinFET technologies. You will work closely with circuit designers and layout leads to ensure robust design verification while serving as a role model with outstanding technical expertise and interpersonal skills.

Key Responsibilities

• Lead the layout team in executing complex layout projects for analog/mixed-signal circuits.
• Inspire, motivate, and establish effective organizational structures and communication protocols while delegating and managing time efficiently.
• Collaborate with circuit designers or layout leads to plan, schedule work, and negotiate layout trade-offs.
• Review and analyze floorplans and circuit complexities to drive efficient design verification using industry tools.
• Interpret LVS, DRC, and ERC reports to ensure timing, area, and power requirements are met using advanced CAD tools.

Required Qualifications

• 10+ years of experience in analog/mixed-signal layout design of deep submicron CMOS circuits and at least 3+ years of recent experience on advanced nodes including FinFET technologies.
• Experience with analog/mixed-signal IP (e.g., SERDES PHY, transmitter/receiver, PLL, DDR PHY, ADCs, DACs, LDOs, etc.).
• Proven track record in leading complex layout macros from floorplan analysis through physical design verification.
• Strong understanding of CAD flows and tools for analog/mixed-signal layout design.
• Expertise in crafting well-matched, low noise, and low power analog blocks comprising transistors, resistors, capacitors, pad IOs, and ESD structures.
• High proficiency in custom and standard cell-based floor planning and hierarchical layout assembly.
• Deep understanding of issues such as IR drop, RC delay, electro-migration, self-heating, and coupling capacitance.
• Ability to identify failure-prone circuitry and layout structures and collaborate using analog and DFM standard methodologies.
• Proficiency in interpreting CALIBRE DRC, ERC, and LVS reports.
• Knowledge of CADENCE or MENTOR GRAPHICS layout tools.
• Excellent interpersonal skills with the ability to work effectively with remote teams.

Preferred Qualifications

• Familiarity with Synopsys/Cadence Analog Layout Tools (Preference: 5).
• Proficiency in using Virtuoso (Preference: 5).
• Experience with Calibre (Preference: 5).
• Basic knowledge of Python (Preference: 2).

Benefits & Perks

• Compensation: Base salary range of $76,200 - $156,310/yr with eligibility for additional variable compensation, bonus, or commission.
• Flexible work arrangements.
• Healthcare including dental, vision, mental health, and well-being programs.
• Financial well-being programs such as 401(k) and Employee Share Ownership Plan.
• Paid time off, paid holidays, and paid parental leave.
• Family building benefits including adoption assistance, surrogacy, and cryopreservation.
• Social support benefits like subsidized back-up child/elder care and tutoring.
• Opportunities for mentoring, coaching, and continuous learning.
• Employee Resource Groups and disaster relief support.