IC Design Engineer

Broadcom9 months ago
Irvine, CA, United States
Hybrid
Full-time
Junior Level (1-3 years)

Job Description

Position Overview

Seeking an experienced IC Design Engineer to design the digital portions of a high-performance SerDes IP for next-generation communication systems. The ideal candidate will have deep expertise in digital and mixed-signal design, system-level integration, and silicon validation for high-speed interfaces.

Key Responsibilities

  • Understanding the architecture of transmitters, receivers, equalizers, clock recovery circuits, and other digital components of high-performance SerDes supporting various communication standards.
  • Design, simulate, and optimize SerDes-related digital components taking into consideration factors such as data rate, jitter, and power consumption.
  • Analyze and resolve Lint and Clock/Reset Domain crossing issues in the design.
  • Collaborate with the broader engineering team to ensure robust signal integrity and power integrity in SerDes designs.
  • Collaborate with cross-functional teams, including physical design, system engineering, and validation teams, to ensure seamless integration of SerDes IP into larger systems.
  • Prepare and maintain comprehensive design documentation, including specifications, microarchitecture, and test plans.
  • Support silicon bring-up and debug efforts.

Required Qualifications

  • BS with 12+ years of relevant industry experience. Advanced degree preferred.
  • Proven experience in SerDes design with a focus on high-speed communication interfaces.
  • Must have strong Logic Design and RTL coding (Verilog HDL) skills.
  • Familiarity with analog and mixed-signal circuit design principles.
  • Thorough understanding of the impact of process technologies on SerDes design.
  • Excellent problem-solving skills and ability to troubleshoot complex mixed-signal IP blocks.
  • Familiarity with system-level considerations in high-speed communication interfaces.
  • Understanding of low power design and validation techniques including UPF.
  • Familiarity with design constraint generation, logic synthesis, timing closure analysis and Clock/Reset domain crossing checks.
  • Self-motivated with the ability to work independently.
  • Good verbal and written communication skills.
  • Ability to work with remote and cross-functional teams.

Benefits & Perks

  • Compensation: $141,300 - $226,000 per year, plus eligibility for a discretionary annual bonus and equity awards.
  • Benefits: Competitive and comprehensive package including Medical, Dental, and Vision plans, 401(K) participation with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave, and vacation time.

Required Skills

System Integration
Low Power Design & UPF
SerDes Design
Logic Design
RTL Coding (Verilog HDL)
Design Documentation
Clock/Reset Domain Crossing
Digital & Mixed-Signal Design
High-Speed Communication Interfaces
Silicon Validation