Senior Process Development Engineer

Position Overview

Senior Process Engineer – Help Pioneer the Future of Optical Computing Hardware! Located in Gardena, CA (Onsite), you will lead key development efforts in wafer and die-level packaging within a well-funded stealth startup. Our mission is to develop breakthrough optical computing hardware that surpasses the limitations of traditional electronics. This hands-on, highly technical role is central to launching our first product.

Key Responsibilities

• Develop and own process recipes for wafer-level and die-level packaging techniques including eutectic bonding, flip-chip attachment, underfill, and protective coatings.
• Achieve high-yield bonding (>99.9%) and ensure thermal reliability through 20,000+ cycles.
• Analyze failure mechanisms using X-ray, SAM, SEM/TEM, shear testing, and other methods, feeding results back into process and design improvements.
• Lead the transition of R&D processes into repeatable, high-volume production workflows using SPC and tool selection methodologies.
• Serve as technical lead for corrective actions stemming from root cause analysis and field data.
• Collaborate across design, electrical, and mechanical engineering teams to fine-tune packaging architecture.
• Support hiring efforts and mentor junior engineers to grow internal manufacturing capabilities.

Required Qualifications

• MS or PhD in Materials Science, Electrical Engineering, Chemical Engineering, or a related field.
• 3+ years of hands-on experience in semiconductor process development or advanced packaging.
• Proven track record in developing and qualifying bonding processes such as eutectic, flip-chip, or hybrid methods.
• Strong command of statistical quality control practices and continuous improvement strategies.
• Comfortable working in a fast-paced lab and production environment, including extended hours when needed.

Preferred Qualifications

• Background in nanofabrication techniques (e-beam lithography, dry etch, PECVD, CMP).
• Experience integrating photonic components such as SiPh or InP into electronic packages.
• Prior work with optoelectronic device packaging or hybrid integration.

Benefits & Perks

• High-impact opportunity at the forefront of photonics and next-generation computing.
• Seed-funded startup with ambitious growth plans and hands-on technical leadership.
• Early-stage equity and long-term incentive plans.
• Relocation assistance to Southern California.
• Comprehensive health coverage: medical, dental, and vision.
• Paid parental leave, flexible vacation policy, and company holidays.
• Compensation: $120,000 - $200,000 plus equity.