Entry-Level DDR PHY Verification Engineer

Job Description

A leading semiconductor company in Austin is looking for a motivated Verification Engineer to join their DDR PHY IP development team. As an entry-level engineer, you will verify high-performance DDR PHY IP for cutting-edge systems in data centers, mobile, and automotive markets. Ideal candidates hold a degree in Electrical Engineering, have foundational knowledge in digital design, and are skilled in System Verilog and UVM.

This role fosters growth in memory interface technologies within a collaborative environment.

Job Reference: #J-18808-Ljbffr